New efficient designs of reversible logic gates and circuits in the QCA technology

Quantum-dot cellular automata (QCA) is a developing nanotechnology, which seems to be a good candidate to replace the conventional complementary metal-oxide-semiconductor (CMOS) technology. The QCA has the advantages of very low power dissipation, faster switching speed, and extremely low circuit area, which can be used in designing nanoscale reversible circuits. In this paper, the new efficient QCA implementations of the basic reversible Gates such as: CNOT, Toffoli, Feynman, Double Feynman, Fredkin, Peres, MCL, and R Gates are presented based on the straight interactions between the QCA cells. Also, the designs of 4-Bit reversible parity checker and 3-bit reversible binary to Grey converter are introduced using these optimized reversible Gates. The proposed layouts are designed and simulated using QCADesigner software. In comparison with previous QCA designs, the proposed layouts are implemented with the minimum area, minimum number of cells, and minimum delay without any wire-crossing techniques. Also, in comparison with the CMOS technology, the proposed layouts are more efficient in terms of the area and power. Therefore, our designs can be used to realize quantum computation in ultralow power computer communication

Implementation of a complete gate for quantum-dot cellular automata

In the last few decades, scaling in feature size and increase in processing power have been achieved by conventional CMOS technology.  Due to basic physical limitations, the conventional VLSI technology faces serious challenging problems in feature size reduction. Quantum dot cellular automata (QCA) has the potential to be one of the features promising nanotechnologies because of higher speed, smaller size and lower power consumption in comparison with transistor-based technology. In this paper, a complete Gate structure for implementation in QCA is presented. The inputs of the proposed structure are a, b and Cin (carry in) and the outputs are AND, OR, NAND, NOR, XOR, XNOR, NOT (Not a), Sum and Cout (carry out). The proposed layout is designed and simulated in the QCA Designer software. The results show that, our complete Gate structure is optimized in terms of cell count, area, and delay. Therefore, this structure can be used in designing of QCA based circuits

A six-channel microstrip diplexer for multi-service wireless communication systems

In this paper, a six-channel microstrip diplexer is designed and fabricated. It operates at 0.75/0.85/1/1.25/1.6/1.8 GHz for multi-service wireless communication systems. It consists of two stub-loaded resonators, which are integrated by coupled lines. The channels are close together, which makes the proposed diplexer suitable for frequency division duplex (FDD) schemes. The proposed structure has a compact size of 0.025 λg2 where λg is the guided wavelength calculated at 0.75 GHz. The other advantages of the introduced multi-channel diplexer are the low insertion losses of 1.62/1.27/0.43/0.53/1.26 and 1 dB, as well as good return losses of 26/26/25/25/21.7 and 22 dB at 0.75/0.85/1/1.25/1.6/1.8 GHz respectively. A good isolation of less than 22 dB is obtained between the channels. In order to design the presented diplexer a designing technique is used which is based on the proposing of an equivalent approximated LC model and calculating the inductors and capacitors. To confirm the simulation results, the introduced diplexer is fabricated and measured

Parameters estimation of squirrel-cage induction motors using ANN and ANFIS

AbstractIn the transient behavior analysis of a squirrel-cage induction motor, the parameters of the single-cage and double-cage models are studied. These parameters are usually hard to obtain. This paper presents two new methods to predict the induction motor parameters in the single-cage and double-cage models based on artificial neural network (ANN) and adaptive neuro-fuzzy inference system (ANFIS). For this purpose, the experimental data (manufacturer data) of 20 induction motors with the different power are used. The experimental data are including of the starting torque and current, maximum torque, full load sleep, efficiency, rated active power and reactive power. The obtained results from the proposed ANN and ANFIS models are compared with each other and with the experimental data, which show a good agreement between the predicted values and the experimental data. But the proposed ANFIS model is more accurate than the proposed ANN model

A Panel Estimation of the Relationship Between Trade Liberalization, Economic Growth and CO2 Emissions in BRICS Countries

In the last few years, several studies have found an inverted-U relationship between per capita income and environmental degradation. This relationship, known as the environmental Kuznets curve (EKC), suggests that environmental degradation increases in the early stages of growth, but it eventually decreases as income exceeds a threshold level. However, this paper investigation relationship between per capita CO2 emission, growth economics and trade liberalization based on econometric techniques of unit root test, co-integration and a panel data set during the period 1960-1996 for BRICS countries. Data properties were analyzed to determine their stationarity using the LLC , IPS , ADF and PP unit root tests which indicated that the series are I(1). We find a cointegration relationship between per capita CO2 emission, growth economics and trade liberalization by applying Kao panel cointegration test. The evidence indi cates that in the long-run trade liberalization has a positive significant impact on CO2 emissions and impact of trade liberalization on emissions growth depends on the level of income Our findings suggest that there is a quadratic relationship between relationship between real GDP and CO2 emissions for the region as a whole. The estimated long-run coefficients of real GDP and its square satisfy the EKC hypothesis in all of studied countries. Our estimation shows that the inflection point or optimal point real GDP per capita is about 5269.4 dollars. The results show that on average, sample countries are on the positive side of the inverted U curve. The turning points are very low in some cases and very high in other cases, hence providing poor evidence in support of the EKC hypothesis. Thus, our findings suggest that all BRICS countries need to sacrifice economic growth to decrease their emission level

High-Performance Ultra-Compact Dual-Band Bandpass Filter for Global System for Mobile Communication-850/Global System for Mobile Communication-1900 Applications

This work presents a novel microstrip dual-band bandpass filter (BPF) using meandros spirals and patch cells, which is proposed for the first time by this work. It occupies a very compact size of 0.0017 λg2. The proposed filter is designed to operate at Fo1=0.85 GHz and Fo2=1.85 GHz for GSM-850/GSM-1900 applications. In addition to the small size, it has several advantages in terms of wide fractional bandwidths (FBW), low insertion losses and high return losses at both channels. The simulated insertion losses at the lower and upper passbands are 0.05 dB and 0.1 dB, respectively. Another advantage of the proposed BPF of this work is the attenuated harmonics, where it is able to suppress 1st, 2nd, 3rd and 4th harmonics (4.11 Fo1) with -20 dB maximum harmonic level

An Area-efficient Microstrip Diplexer with a Novel Structure and Low Group Delay for Microwave Wireless Applications

In this work, a novel structure of a microstrip diplexer consisting of coupled patch cells is presented. It works at 2.5 GHz and 4.7 GHz for wireless applications. The proposed structure is well miniaturized with a compact area of 0.015 λg2, fabricated on 0.787 mm substrate height. It has two wide fractional bandwidths (FBWs) of 28% and 17.9% at the lower and upper channels, respectively. Another feature of the proposed design is the low group delays, which are better than 0.4 ns for both channels. Moreover, the designed diplexer can suppress the harmonics up to 10 GHz. Meanwhile, the insertion losses at both channels are low. The design method is based on proposing an approximated equivalent LC circuit of a novel basic resonator. The information about the resonator behavior is extracted from the even and odd modes analysis of the proposed equivalent LC circuit. Finally, our introduced diplexer is fabricated and measured to verify the simulation results, where the simulated and measured results are in good agreement

Design and Fabrication of a Novel Ultra Compact Microstrip Diplexer Using Interdigital and Spiral Cells

A dual-band bandpass-bandpass microstrip diplexer with very small size and good performance is designed in this work. The proposed diplexer has a novel structure which is introduced for the first time in this paper. In comparison with the previously reported diplexers, it occupies the most compact size of 0.002 λg2 (226.7 mm2), fabricated on 0.787 mm dielectric substrate height. The resonance frequencies of the presented diplexer are located at 0.76 GHz and 1.79 GHz making it suitable for the global system for mobile communications (GSM) applications. It has a wide flat channels with two fractional bandwidths (FBWs) of 41.1% and 50%. Another feature of the proposed diplexer is its ability to suppress the harmonics. It can attenuate the 1st to 7th harmonics. Moreover, it has low insertion losses and low group delays at both channels while the isolation and return losses are acceptable. Finally, the proposed diplexer is fabricated and measured to verify the simulation results, where a good agreement between the simulation and measurement results is obtained

A Review on the Structure, Application and Performance of the Passive Microstrip Devices

Microstrip technology is widely applied for design and implementation of several communication devices such as filters, diplexers, triplexers, multiplexers, couplers, etc. They are utilized to isolate desired signals and remove disturbing signals. The layout of filters, diplexers and triplexers have two, three and four ports, respectively. Passive filters have at least one pass channel, whereas diplexers have at least two channels to transmit the desired signal, and multiplexers have more passbands with more channels. In order to implement the passive components, first a cell called resonator must be designed. Creativity is very important in resonator design. It must be small and novel to get a better device than previous works. Therefore, the layout of previous reported resonator, used in passive microstrip devices, are studied in this work. There is a fierce competition among designers to miniaturize and increase the device performance. Hence we will investigate them, from the point of view size and performance, in this work. Some diplexers are multi-channel, which are more difficult to design than two-channel diplexers. Therefore, the multi-channel diplexers are less reported than the two-channel diplexers. The design of multiplexers is also very difficult because several channels must be controlled. Hence, they are less designed than filters and diplexers. The diplexers can be bandpass-bandpass or lowpass-bandpass, where the latest is less designed. This is because designing a lowpass-bandpass diplexer needs lowpass and bandpass resonators, whereas the design of a bandpass-bandpass diplexer needs only a bandpass resonator

A New Design Approach for a Compact Microstrip Diplexer with Good Passband Characteristics

This paper presents an efficient theoretical design approach of a very compact microstrip diplexer for modern wireless communication system applications. The proposed basic resonator is made of coupled lines, simple transmission line and a shunt stub. The coupled lines and transmission line make a U-shape resonator while the shunt stub is loaded inside the U-shape cell to save the size significantly, where the overall size of the presented diplexer is only 0.008 λg2 . The configuration of this resonator is analyzed to increase intuitive understanding of the structure and easier optimization. The first and second resonance frequencies are f o1 = 895 MHz and f o2 = 2.2 GHz. Both channels have good properties so that the best simulated insertion loss at the first channel (0.075 dB) and the best simulated common port return losses at both channels (40.3 dB and 31.77 dB) are achieved. The presented diplexer can suppress the harmonics acceptably up to 3 GHz (3.3 fo1 ). Another feature is having 31% fractional bandwidth at the first channel